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IPA041N04N G

IPA041N04N G

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TO-220-3

  • 描述:

    类型:-;漏源电压(Vdss):-;连续漏极电流(Id):-;功率(Pd):-;导通电阻(RDS(on)@Vgs,Id):-;阈值电压(Vgs(th)@Id):-;栅极电荷(Qg@Vgs):-;输入电...

  • 数据手册
  • 价格&库存
IPA041N04N G 数据手册
MOSFET MetalOxideSemiconductorFieldEffectTransistor OptiMOSTM OptiMOSª3Power-Transistor,40V IPA041N04NG DataSheet Rev.2.0 Final PowerManagement&Multimarket OptiMOSª3Power-Transistor,40V IPA041N04NG 1Description TO-220-FP Features •OptimizedtechnologyforDC/DCconverters •QualifiedaccordingtoJEDEC1)fortargetapplications •N-channel,normallevel •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •100%Avalanchetested •Pb-freeplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 Drain Pin 2 Table1KeyPerformanceParameters Parameter Value Unit VDS 40 V RDS(on),max 4.1 mΩ ID 70 A Gate Pin 1 Source Pin 3 Type/OrderingCode Package Marking RelatedLinks IPA041N04N G PG-TO220-FP 041N04N - 1) J-STD20 and JESD22 Final Data Sheet 2 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Final Data Sheet 3 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG 2Maximumratings atTj=25°C,unlessotherwisespecified Table2Maximumratings at 25 °C Parameter Symbol Continuous drain current Values Unit Note/TestCondition 70 49 A VGS=10V,TC=25°C VGS=10V,TC=100°C - 280 A TC=25°C - - 70 A TC=25°C EAS - - 70 mJ ID=70A,RGS=25Ω Gate source voltage VGS -20 - 20 V - Power dissipation Ptot - - 35 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - IAS Avalanche energy, single pulse Pulsed drain current 1) Avalanche current, single pulse 2) 3Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 4.3 K/W - SMD version, device on PCB, minimal footprint RthJA - - 62 K/W - SMD version, device on PCB, 6 cm² cooling area 3) RthJA - - 40 K/W - 1) See figure 3 for more detailed information See figure 13 for more detailed information 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) Final Data Sheet 4 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG 4Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA - 4 V VDS=VGS,ID=45µA - 0.1 10 1 100 µA VDS=40V,VGS=0V,Tj=25°C VDS=40V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance 1) RDS(on) - 3.5 4.1 mΩ VGS=10V,ID=70A Gate resistance RG - 1.6 2.4 Ω - Transconductance gfs 48 96 - S |VDS|>2|ID|RDS(on)max,ID=70A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 40 - Gate threshold voltage VGS(th) 2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 3400 4500 pF VGS=0V,VDS=20V,f=1MHz Output capacitance Coss - 980 1300 pF VGS=0V,VDS=20V,f=1MHz Reverse transfer capacitance Crss - 36 72 pF VGS=0V,VDS=20V,f=1MHz Turn-on delay time td(on) - 16 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=1.6Ω Rise time tr - 3.8 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=1.6Ω Turn-off delay time td(off) - 23 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=1.6Ω Fall time tf - 4.8 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 18 - nC VDD=20V,ID=30A,VGS=0to10V Gate charge at threshold Qg(th) - 10.3 - nC VDD=20V,ID=30A,VGS=0to10V Gate to drain charge Qgd - 5.3 - nC VDD=20V,ID=30A,VGS=0to10V Switching charge Qsw - 12.5 - nC VDD=20V,ID=30A,VGS=0to10V Gate charge total Qg - 42 56 nC VDD=20V,ID=30A,VGS=0to10V Gate plateau voltage Vplateau - 5.1 - V VDD=20V,ID=30A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 40 - nC VDS=0.1V,VGS=0to10V Output charge Qoss - 41 - nC VDD=20V,VGS=0V 1) 2) Measured from drain tab to source pin See ″Gate charge waveforms″ for parameter definition Final Data Sheet 5 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG Table7Reversediode Parameter Symbol Diode continuous forward current Values Unit Note/TestCondition 29 A TC=25°C - 280 A TC=25°C - 0.87 1.2 V VGS=0V,IF=29A,Tj=25°C - 19 - nC VR=20V,IF=29A,diF/dt=400A/µs Min. Typ. Max. IS - - Diode pulse current IS,pulse - Diode forward voltage VSD Reverse recovery charge Qrr Final Data Sheet 6 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG 5Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 40 80 36 32 60 28 ID[A] Ptot[W] 24 20 40 16 12 20 8 4 0 0 50 100 150 0 200 0 50 TC[°C] 100 150 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 1 µs 100 µs 102 0.5 10 µs 100 0.2 1 10 0.1 ZthJC[K/W] ID[A] 1 ms DC 10 ms 0.05 0.02 10-1 100 0.01 single pulse 10-1 10-1 100 101 102 10-2 10-6 10-5 10-4 VDS[V] 10-2 10-1 100 101 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 7 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 200 8 5.5 V 10 V 7 6V 6.5 V 7V 150 6 6.5 V RDS(on)[mΩ] ID[A] 5 6V 100 5.5 V 50 0 1 2 4 10 V 3 2 1 5V 0 7V 0 3 0 50 100 VDS[V] 150 200 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 200 120 100 150 gfs[S] ID[A] 80 100 60 40 50 175 °C 20 25 °C 0 0 2 4 6 8 0 0 VGS[V] 40 60 80 100 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 20 gfs=f(ID);Tj=25°C 8 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 8 4 7 6 3 RDS(on)[mΩ] 5 4 VGS(th)[V] max typ 2 3 2 1 1 0 -60 -20 20 60 100 140 0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=70A;VGS=10V VGS(th)=f(Tj);VGS=VDS;ID=45µA Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 175 °C 25 °C, max 175 °C, max Ciss Coss 102 IF[A] C[pF] 103 102 101 Crss 101 0 10 20 30 40 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 9 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 102 12 20 V 10 8V 25 °C 32 V 100 °C 8 VGS[V] IAV[A] 150 °C 101 6 4 2 100 10-1 100 101 102 103 0 0 10 tAV[µs] 20 30 40 50 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=30Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 44 42 VBR(DSS)[V] 40 38 36 34 32 30 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 10 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG 6PackageOutlines Figure1OutlinePG-TO220-FP,dimensionsinmm/inches Final Data Sheet 11 Rev.2.0,2014-03-12 OptiMOSª3Power-Transistor,40V IPA041N04NG RevisionHistory IPA041N04N G Revision:2014-03-12,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-03-12 Release of final version WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2014InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 12 Rev.2.0,2014-03-12
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